Ordered Nanoparticles and the Construction of Flash Memory Chips and Circuits



Invention Summary

Nanoparticles with better than 5% size uniformity (e.g., less than ±5% standard deviation among number average particle distribution, such as measured by number average particle diameters) can be created using an ultra-high vacuum non-lithographic technique. Methods, apparatus and systems form memory structures, such as flash memory structures from nanoparticles by providing a source of nanoparticles as a conductive layer. The particles are moved by application of a field, such as an electrical field, magnetic field and even electromagnetic radiation.


Market Opportunity

The technology opens the door for many commercial applications in biomedical, optical and electronic devices. Commercial manufacturing technologies manipulate millions and billions of atoms at a time using conventional shaping technologies. For example, chips can be made by forming pure silicon substrates and then etching and depositing patterns of atoms and molecules on its surface. Quality of the control of the deposition of atomic materials requires the sacrifice of manufacturing speeds to assure quality replication of intended designs. Hence, creation of ordered and patterned nanoparticles with high purity and good size control is a prerequisite for many device applications. Light emitting devices, sensors, single electron transistors and bimolecular tagging are only a small sample of potential applications.


Features & Benefits

•The technology relates to a system and process to create large quantity of patterned and ordered nanoparticles with excellent size control onto an electrically insulating surface over a transistor and further applying at least another electrically insulating layer over the ordered nanoparticles to create a flash memory. The process for the implementation of nanoparticle based floating gate flash memory is suitable for volume commercial manufacturing.


•By being able to control the distribution and density of particle distribution on the tunnel oxide layers, excellent control of conductive properties can be designed and manufactured with simple adjustments in the process.


•Layers can be provided to form a floating gate or other structures and functions supplemental to or modifying of the underlying flash memory device.


Intellectual Property         Patent No.:  7,790,560 and 8,084,101


Patent Information:
For Information, Contact:
John Minnick
Business Development Officer
University of Nevada, Las Vegas
Biswajit (bj) Das
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